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Silicon Labs /EFR32MG24A111F1536GM48 /DCDC_S /IF

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Interpret as IF

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (BYPSW)BYPSW 0 (WARM)WARM 0 (RUNNING)RUNNING 0 (VREGINLOW)VREGINLOW 0 (VREGINHIGH)VREGINHIGH 0 (REGULATION)REGULATION 0 (TMAX)TMAX 0 (EM4ERR)EM4ERR 0 (PFMXMODE)PFMXMODE

Description

Interrupt Flags

Fields

BYPSW

Bypass Switch Enabled
WARM

DCDC Warmup Time Done
RUNNING

DCDC Running
VREGINLOW

VREGIN below threshold
VREGINHIGH

VREGIN above threshold
REGULATION

DCDC in regulation
TMAX

Ton_max Timeout Reached
EM4ERR

EM4 Entry Request Error
PFMXMODE

Entered PFMX mode

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data